목차
없음
본문내용
를 설계하라.
C
B
A
a
b
c
d
e
f
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
1
0
0
0
0
1
0
0
0
1
1
0
0
1
0
0
1
1
0
0
0
1
0
0
0
0
1
0
1
0
1
1
0
0
1
1
1
0
1
0
0
1
0
0
1
1
1
1
1
0
0
0
1
BA
C
00
01
11
10
0
1
1
1
BA
C
00
01
11
10
0
1
1
1
1
BA
C
00
01
11
10
0
1
1
1
BA
C
00
01
11
10
0
1
1
1
BA
C
00
01
11
10
0
1
BA
C
00
01
11
10
0
1
1
1
1
1
15. 84-2-1코드를 BCD코드로 변환하는 회로를 설계하라.
입력(84-2-1)
출력(BCD)
w
x
y
z
A
B
C
D
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
1
0
1
1
0
0
0
1
0
0
1
0
1
0
0
1
1
0
1
0
0
0
1
0
0
1
0
1
1
0
1
0
1
1
0
1
0
0
1
1
0
1
0
0
1
0
1
1
1
1
0
0
0
1
0
0
0
1
1
1
1
1
0
0
1
1
1
1
0
x
x
x
x
1
1
0
1
x
x
x
x
1
1
0
0
x
x
x
x
0
0
0
1
x
x
x
x
0
0
1
0
x
x
x
x
0
0
1
1
x
x
x
x
yz
wx
00
01
11
10
00
x
x
x
01
11
x
x
1
x
10
1
yz
wx
00
01
11
10
00
x
x
x
01
1
11
x
x
x
10
1
1
1
yz
wx
00
01
11
10
00
x
x
x
01
1
1
11
x
x
x
10
1
1
yz
wx
00
01
11
10
00
x
x
x
01
1
1
11
x
x
1
x
10
1
1
19. 2개의 8x1 멀티플렉서와 하나의 2x1 멀티플렉서를 이용하여 16x1멀티플렉서를 설계하라.
선택선
출력
S3
S2
S1
S0
F
0
0
0
0
i0
0
0
0
1
i1
0
0
1
0
i2
0
0
1
1
i3
0
1
0
0
i4
0
1
0
1
i5
0
1
1
0
i6
0
1
1
1
i7
1
0
0
0
i8
1
0
0
1
i9
1
0
1
0
i10
1
0
1
1
i11
1
1
0
0
i12
1
1
0
1
i13
1
1
1
0
i14
1
1
1
1
i15
22. BCD로 표현된 4비트를 입력으로 받아서 출력으로 입력 9의 보수를 생성하는 조합 논리회로를 설계하여라.
입 력
출 력
a
b
c
d
A
B
C
D
0
0
0
0
1
0
0
1
0
0
0
1
1
0
0
0
0
0
1
0
0
1
1
1
0
0
1
1
0
1
1
0
0
1
0
0
0
1
0
1
0
1
0
1
0
1
0
0
0
1
1
0
0
0
1
1
0
1
1
1
0
0
1
0
1
0
0
0
0
0
0
1
1
0
0
1
0
0
0
0
1
0
1
0
x
x
x
x
1
0
1
1
x
x
x
x
1
1
0
0
x
x
x
x
1
1
0
1
x
x
x
x
1
1
1
0
x
x
x
x
1
1
1
1
x
x
x
x
cd
ab
00
01
11
10
00
1
1
01
11
x
x
x
x
10
x
x
cd
ab
00
01
11
10
00
1
1
01
1
1
11
x
x
x
x
10
x
x
cd
ab
00
01
11
10
00
1
1
01
1
1
11
x
x
x
x
10
x
x
cd
ab
00
01
11
10
00
1
1
01
1
1
11
x
x
x
x
10
1
x
x
23. 2421 코드로 된 10진수를 84-2-1 코드로 바꾸는 보합논리회로를 설계하여라.
입력(2421)
출력(84-2-1)
a
b
c
d
A
B
C
D
0
0
0
0
0
0
0
0
0
0
0
1
0
1
1
1
0
0
1
0
0
1
1
0
0
0
1
1
0
1
0
1
0
1
0
0
0
1
0
0
1
0
1
1
1
0
1
1
1
1
0
0
1
0
1
0
1
1
0
1
1
0
0
1
1
1
1
0
1
0
0
0
1
1
1
1
1
1
1
1
0
1
0
1
x
x
x
x
0
1
1
0
x
x
x
x
0
1
1
1
x
x
x
x
1
0
0
0
x
x
x
x
1
0
0
1
x
x
x
x
1
0
1
0
x
x
x
x
cd
ab
00
01
11
10
00
01
x
x
x
11
1
1
1
1
10
x
x
1
x
cd
ab
00
01
11
10
00
1
1
1
01
1
x
x
x
11
1
10
x
x
x
cd
ab
00
01
11
10
00
1
1
01
x
x
x
11
1
1
10
x
x
1
x
cd
ab
00
01
11
10
00
1
1
01
x
x
x
11
1
1
10
x
x
1
x
C
B
A
a
b
c
d
e
f
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
1
0
0
0
0
1
0
0
0
1
1
0
0
1
0
0
1
1
0
0
0
1
0
0
0
0
1
0
1
0
1
1
0
0
1
1
1
0
1
0
0
1
0
0
1
1
1
1
1
0
0
0
1
BA
C
00
01
11
10
0
1
1
1
BA
C
00
01
11
10
0
1
1
1
1
BA
C
00
01
11
10
0
1
1
1
BA
C
00
01
11
10
0
1
1
1
BA
C
00
01
11
10
0
1
BA
C
00
01
11
10
0
1
1
1
1
1
15. 84-2-1코드를 BCD코드로 변환하는 회로를 설계하라.
입력(84-2-1)
출력(BCD)
w
x
y
z
A
B
C
D
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
1
0
1
1
0
0
0
1
0
0
1
0
1
0
0
1
1
0
1
0
0
0
1
0
0
1
0
1
1
0
1
0
1
1
0
1
0
0
1
1
0
1
0
0
1
0
1
1
1
1
0
0
0
1
0
0
0
1
1
1
1
1
0
0
1
1
1
1
0
x
x
x
x
1
1
0
1
x
x
x
x
1
1
0
0
x
x
x
x
0
0
0
1
x
x
x
x
0
0
1
0
x
x
x
x
0
0
1
1
x
x
x
x
yz
wx
00
01
11
10
00
x
x
x
01
11
x
x
1
x
10
1
yz
wx
00
01
11
10
00
x
x
x
01
1
11
x
x
x
10
1
1
1
yz
wx
00
01
11
10
00
x
x
x
01
1
1
11
x
x
x
10
1
1
yz
wx
00
01
11
10
00
x
x
x
01
1
1
11
x
x
1
x
10
1
1
19. 2개의 8x1 멀티플렉서와 하나의 2x1 멀티플렉서를 이용하여 16x1멀티플렉서를 설계하라.
선택선
출력
S3
S2
S1
S0
F
0
0
0
0
i0
0
0
0
1
i1
0
0
1
0
i2
0
0
1
1
i3
0
1
0
0
i4
0
1
0
1
i5
0
1
1
0
i6
0
1
1
1
i7
1
0
0
0
i8
1
0
0
1
i9
1
0
1
0
i10
1
0
1
1
i11
1
1
0
0
i12
1
1
0
1
i13
1
1
1
0
i14
1
1
1
1
i15
22. BCD로 표현된 4비트를 입력으로 받아서 출력으로 입력 9의 보수를 생성하는 조합 논리회로를 설계하여라.
입 력
출 력
a
b
c
d
A
B
C
D
0
0
0
0
1
0
0
1
0
0
0
1
1
0
0
0
0
0
1
0
0
1
1
1
0
0
1
1
0
1
1
0
0
1
0
0
0
1
0
1
0
1
0
1
0
1
0
0
0
1
1
0
0
0
1
1
0
1
1
1
0
0
1
0
1
0
0
0
0
0
0
1
1
0
0
1
0
0
0
0
1
0
1
0
x
x
x
x
1
0
1
1
x
x
x
x
1
1
0
0
x
x
x
x
1
1
0
1
x
x
x
x
1
1
1
0
x
x
x
x
1
1
1
1
x
x
x
x
cd
ab
00
01
11
10
00
1
1
01
11
x
x
x
x
10
x
x
cd
ab
00
01
11
10
00
1
1
01
1
1
11
x
x
x
x
10
x
x
cd
ab
00
01
11
10
00
1
1
01
1
1
11
x
x
x
x
10
x
x
cd
ab
00
01
11
10
00
1
1
01
1
1
11
x
x
x
x
10
1
x
x
23. 2421 코드로 된 10진수를 84-2-1 코드로 바꾸는 보합논리회로를 설계하여라.
입력(2421)
출력(84-2-1)
a
b
c
d
A
B
C
D
0
0
0
0
0
0
0
0
0
0
0
1
0
1
1
1
0
0
1
0
0
1
1
0
0
0
1
1
0
1
0
1
0
1
0
0
0
1
0
0
1
0
1
1
1
0
1
1
1
1
0
0
1
0
1
0
1
1
0
1
1
0
0
1
1
1
1
0
1
0
0
0
1
1
1
1
1
1
1
1
0
1
0
1
x
x
x
x
0
1
1
0
x
x
x
x
0
1
1
1
x
x
x
x
1
0
0
0
x
x
x
x
1
0
0
1
x
x
x
x
1
0
1
0
x
x
x
x
cd
ab
00
01
11
10
00
01
x
x
x
11
1
1
1
1
10
x
x
1
x
cd
ab
00
01
11
10
00
1
1
1
01
1
x
x
x
11
1
10
x
x
x
cd
ab
00
01
11
10
00
1
1
01
x
x
x
11
1
1
10
x
x
1
x
cd
ab
00
01
11
10
00
1
1
01
x
x
x
11
1
1
10
x
x
1
x
소개글