목차
[M.Morris MANO] 디지털 논리와 컴퓨터 설계 3장 연습문제
Logic and computer design fundamentals
3단원 연습문제입니다.
2번 6번 10번 14번 18번 22번 26번
Logic and computer design fundamentals
3단원 연습문제입니다.
2번 6번 10번 14번 18번 22번 26번
본문내용
in the right lane, RL is 1.
4. If there is no car in the car pool lane, there are cars in both the left and right lanes, and RR is 1, then LL = 1.
5. If there is no car in the car pool lane, there are cars in both the left and right lanes, and RR is 0, then RL = 1.
6. If any PL, LL, or RL is not specified to be 1 above, then it has value 0.
(a) Find the truth table for the controller part.
(b) Find a minimum multiple-level gate implementation with minimum gate input count using AND gates, OR gates and inverters.
(a) sol)
Decimal
PS
LS
RS
RR
PL
LL
RL
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
2
0
0
1
0
0
0
1
3
0
0
1
1
0
0
1
4
0
1
0
0
0
1
0
5
0
1
0
1
0
1
0
6
0
1
1
0
0
0
1
7
0
1
1
1
0
1
0
8
1
0
0
0
1
0
0
9
1
0
0
1
1
0
0
10
1
0
1
0
1
0
0
11
1
0
1
1
1
0
0
12
1
1
0
0
1
0
0
13
1
1
0
1
1
0
0
14
1
1
1
0
1
0
0
15
1
1
1
1
1
0
0
Truth
table
(b) sol)
PL = PS
LL =
RL =
3-22. Perform a low-cost (use minumum total normalized area as cost) technology mapping using all cells from Table 3-3 for the circuit shown in Figure 3-32.
sol)
3-26. The logic diagram for a 74HC138 MSI CMOS circuit is given in Figure 3-35. Find the Boolean function for each of the outputs. Describe the circuit function carefully.
sol)
4. If there is no car in the car pool lane, there are cars in both the left and right lanes, and RR is 1, then LL = 1.
5. If there is no car in the car pool lane, there are cars in both the left and right lanes, and RR is 0, then RL = 1.
6. If any PL, LL, or RL is not specified to be 1 above, then it has value 0.
(a) Find the truth table for the controller part.
(b) Find a minimum multiple-level gate implementation with minimum gate input count using AND gates, OR gates and inverters.
(a) sol)
Decimal
PS
LS
RS
RR
PL
LL
RL
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
2
0
0
1
0
0
0
1
3
0
0
1
1
0
0
1
4
0
1
0
0
0
1
0
5
0
1
0
1
0
1
0
6
0
1
1
0
0
0
1
7
0
1
1
1
0
1
0
8
1
0
0
0
1
0
0
9
1
0
0
1
1
0
0
10
1
0
1
0
1
0
0
11
1
0
1
1
1
0
0
12
1
1
0
0
1
0
0
13
1
1
0
1
1
0
0
14
1
1
1
0
1
0
0
15
1
1
1
1
1
0
0
Truth
table
(b) sol)
PL = PS
LL =
RL =
3-22. Perform a low-cost (use minumum total normalized area as cost) technology mapping using all cells from Table 3-3 for the circuit shown in Figure 3-32.
sol)
3-26. The logic diagram for a 74HC138 MSI CMOS circuit is given in Figure 3-35. Find the Boolean function for each of the outputs. Describe the circuit function carefully.
sol)
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