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TE;
parameter [3:0] ST0=0,ST1=1,ST2=2,ST3=3,ST4=4,ST5=5;
always @(posedge CLK) begin
if (!RST) STATE <=ST0;
else
case (STATE)
ST0 : STATE <= ST1;
ST1 : STATE <= ST2;
ST2 : STATE <= ST3;
ST3 : STATE <= ST4;
ST4 : STATE <= ST5;
ST5 : STATE <= ST0;
endcase
end
assign {West_t_
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1) ? `SEGMENT_10:
(STATE == 2) ? `SEGMENT_9:
(STATE == 3) ? `SEGMENT_8:
(STATE == 4) ? `SEGMENT_7:
(STATE == 5) ? `SEGMENT_6:
(STATE == 6) ? `SEGMENT_5:
(STATE == 7) ? `SEGMENT_4:
(STATE == 8) ? `SEGMENT_3:
(STATE == 9) ? `SEGMENT_2:
(STATE == 10) ? `SEGMENT_1:
`SEGMENT_0;
assign{Q} = (STATE == 0) ?
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