목차
1. The chip making process
2. Making the Wafer
3. The Mask Making Process
4. Epitaxy
5. Photolithography process
6. Oxidation & Exposure
7. Etch & strip
8. Diffusion & Implant
9. Deposition
10. Oxidation
11. Interconnect - Vias
12. Interconnect – Metallization
13 .Chemical Mechanical Planarization
14. Interconnect – Layers
15. Inspection & Measurement
16. Yield Impact
17. Test, Assembly & Packaging
18. Wafer Probe
19. Memory repair
20. Assembly & Packiging
21. Package Test
2. Making the Wafer
3. The Mask Making Process
4. Epitaxy
5. Photolithography process
6. Oxidation & Exposure
7. Etch & strip
8. Diffusion & Implant
9. Deposition
10. Oxidation
11. Interconnect - Vias
12. Interconnect – Metallization
13 .Chemical Mechanical Planarization
14. Interconnect – Layers
15. Inspection & Measurement
16. Yield Impact
17. Test, Assembly & Packaging
18. Wafer Probe
19. Memory repair
20. Assembly & Packiging
21. Package Test
본문내용
Making the Wafer
The process
-A seed crystal is suspended in a molten bath of silicon
-It is slowly pulled up and grows into an ingot of silicon
-The ingot is removed and ground down to diameter
-The end is cut off, then thin silicon wafers are sawn off (sliced) and polished
Epitaxy
The growth of an ultra-pure layer of crystalline silicon
Approx 3% of wafer thickness
Contaminant-free for the subsequent construction of transistor
The process
-A seed crystal is suspended in a molten bath of silicon
-It is slowly pulled up and grows into an ingot of silicon
-The ingot is removed and ground down to diameter
-The end is cut off, then thin silicon wafers are sawn off (sliced) and polished
Epitaxy
The growth of an ultra-pure layer of crystalline silicon
Approx 3% of wafer thickness
Contaminant-free for the subsequent construction of transistor
소개글