VHDL-디지털 시계

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VHDL-디지털 시계에 대한 보고서 자료입니다.

본문내용

;
ALARM_HUR : OUT INTEGER RANGE 23 DOWNTO 0;
ALARM_MIN : OUT INTEGER RANGE 59 DOWNTO 0;
SET_MODE : OUT STD_LOGIC_VECTOR (1 DOWNTO 0);
BEEP : OUT STD_LOGIC
);
END COMPONENT;
TYPE WATCH_MD IS (M_TIME, M_ST_WATCH, M_ALARM, M_TIME_S);
SIGNAL WATCH_MODE : WATCH_MD;
SIGNAL MODE : STD_LOGIC_VECTOR (2 DOWNTO 0);
SIGNAL TIME_HUR : INTEGER RANGE 23 DOWNTO 0;
SIGNAL TIME_MIN : INTEGER RANGE 59 DOWNTO 0;
SIGNAL TIME_SEC : INTEGER RANGE 59 DOWNTO 0;
SIGNAL SET_T_MODE : STD_LOGIC_VECTOR (1 DOWNTO 0);
SIGNAL ST_HUR : INTEGER RANGE 23 DOWNTO 0;
SIGNAL ST_MIN : INTEGER RANGE 59 DOWNTO 0;
SIGNAL ST_SEC : INTEGER RANGE 59 DOWNTO 0;
SIGNAL ST_SEC_HUN : INTEGER RANGE 99 DOWNTO 0;
SIGNAL ALARM_HUR : INTEGER RANGE 23 DOWNTO 0;
SIGNAL ALARM_MIN : INTEGER RANGE 59 DOWNTO 0;
SIGNAL SET_A_MODE : STD_LOGIC_VECTOR (1 DOWNTO 0);
BEGIN
PROCESS (SW_MODE)
BEGIN
IF SW_MODE'EVENT AND SW_MODE = '1' THEN
CASE WATCH_MODE IS
WHEN M_TIME =>
WATCH_MODE <= M_ST_WATCH;
MODE <= "010";
LED_MODE <= "100";
WHEN M_ST_WATCH =>
WATCH_MODE <= M_ALARM;
MODE <= "100";
LED_MODE <= "010";
WHEN M_ALARM =>
WATCH_MODE <= M_TIME_S;
MODE <= "001";
LED_MODE <= "001";
WHEN M_TIME_S =>
WATCH_MODE <= M_TIME;
MODE <= "000";
LED_MODE <= "000";
WHEN OTHERS =>
WATCH_MODE <= M_TIME;
MODE <= "000";
LED_MODE <= "000";
END CASE;
END IF;
END PROCESS;
U1 : TIME
PORT MAP (
CLK => CLK_100H,
MODE => MODE,
SW_F1 => SW_F1,
SW_F2 => SW_F2,
HOUR => TIME_HUR,
MINUTE => TIME_MIN,
SECOND => TIME_SEC,
SET_MODE => SET_T_MODE
);
U2 : ST_WATCH
PORT MAP (
CLK => CLK_100H,
MODE => MODE,
SW_F1 => SW_F1,
SW_F2 => SW_F2,
HOUR => ST_HUR,
MINUTE => ST_MIN,
SECOND => ST_SEC,
SEC_HUN => ST_SEC_HUN
);
U3 : ALARM
PORT MAP (
CLK => CLK_100H,
HOUR => TIME_HUR,
MINUTE => TIME_MIN,
MODE => MODE,
SW_F1 => SW_F1,
SW_F2 => SW_F2,
ALARM_ON => ALARM_ON,
ALARM_HUR => ALARM_HUR,
ALARM_MIN => ALARM_MIN,
SET_MODE => SET_A_MODE,
BEEP => BEEP
);
PROCESS (CLK_100H)
BEGIN
IF CLK_100H'EVENT AND CLK_100H = '1' THEN
CASE MODE IS
WHEN "010" =>
HOUR <= ST_HUR;
MINUTE <= ST_MIN;
SECOND <= ST_SEC;
SEC_HUN <= ST_SEC_HUN;
DIGIT_ON <= "1111";
WHEN "100" =>
HOUR <= ALARM_HUR;
MINUTE <= ALARM_MIN;
SECOND <= 0;
SEC_HUN <= 0;
IF SET_A_MODE = "00" THEN
DIGIT_ON <= "1100";
ELSIF SET_A_MODE = "01" THEN
DIGIT_ON <= "1100";
ELSIF SET_A_MODE = "10" THEN
DIGIT_ON(3) <= CLK_1H;
DIGIT_ON(2 DOWNTO 0) <= "100";
ELSIF SET_A_MODE = "11" THEN
DIGIT_ON(3) <= '1';
DIGIT_ON(2) <= CLK_1H;
DIGIT_ON(1 DOWNTO 0) <= "00";
ELSE
DIGIT_ON <= "1100";
END IF;
WHEN "001" =>
HOUR <= TIME_HUR;
MINUTE <= TIME_MIN;
SECOND <= TIME_SEC;
SEC_HUN <= 0;
DIGIT_ON(0) <= '0';
IF SET_T_MODE = "01" THEN
DIGIT_ON(3 DOWNTO 2) <= "11";
DIGIT_ON(1) <= CLK_1H;
ELSIF SET_T_MODE = "10" THEN
DIGIT_ON(3) <= '1';
DIGIT_ON(2) <= CLK_1H;
DIGIT_ON(1) <= '1';
ELSIF SET_T_MODE = "11" THEN
DIGIT_ON(3) <= CLK_1H;
DIGIT_ON(2 DOWNTO 1) <= "11";
ELSE
DIGIT_ON(3 DOWNTO 1) <= "111";
END IF;
WHEN OTHERS =>
HOUR <= TIME_HUR;
MINUTE <= TIME_MIN;
SECOND <= TIME_SEC;
SEC_HUN <= 0;
DIGIT_ON <= "1110";
END CASE;
END IF;
END PROCESS;
END A;

키워드

VHDL,   디지털시계,   소스프로그램,   알테라 시계,   VHDL시계