2012년도 전자공학심화 프로그램 종합설계 프로젝트 최종보고서,디지털시스템 최종보고서 - VHDL을 이용한 ATM SYSTEM 설계

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2012년도 전자공학심화 프로그램 종합설계 프로젝트 최종보고서,디지털시스템 최종보고서 - VHDL을 이용한 ATM SYSTEM 설계에 대한 보고서 자료입니다.

목차

1. 설계 목적 03

2. ComboⅡ에서 이용한 장치 설명 및 동작원리 03
(1) 7-Segment Array 03
(2) LED 03
(3) 키패드 04
(4) 메인 클럭 04
(5) VFD 05
(6) 버튼 스위치 07
(7) 버스 스위치 07

3. ATM SYSTEM FLOW CHART 09

4. ATM SYSTEM 블록도 10

5. 각 process 신호 11
(1) 클럭관련 process 11
(2) atm process 11
(3) keypad 관련 process 12
(4) 세그먼트 관련 process 13
(5) vfd 관련 process 14

6 프로젝트 수행 진행 및 결과 15
(1) 메뉴 1. 잔액조회 15
(2) 메뉴 2. 출금 15
(3) 메뉴 3. 입금 17

7 문제점 및 개선방안 19

8. 고찰 20

[부록] 21
부록 1. 소스코드 21

본문내용

;
vfd_data <= \"00001100\";
when entry_mode =>
vfd_rs <= \'0\';
vfd_rw <= \'0\';
vfd_data <= \"00000110\";
when clear_disp =>
vfd_rs <= \'0\';
vfd_rw <= \'0\';
vfd_data <= \"00000001\";
when delay_t =>
vfd_rs <= \'0\';
vfd_rw <= \'0\';
vfd_data <= \"00000010\";
-- 첫 번째 라인 문자 데이터 입력
when line1 =>
vfd_rw <= \'0\';
case cnt is
when 0 =>
vfd_rs <= \'0\';
vfd_data <= \"10000000\";
when 1 =>
vfd_rs <= \'1\';
vfd_data <= \"00100000\"; --
when 2 =>
vfd_rs <= \'1\';
vfd_data <= \"00100000\"; --
when 3 =>
vfd_rs <= \'1\';
vfd_data <= \"01000001\"; -- A
when 4 =>
vfd_rs <= \'1\';
vfd_data <= \"01010100\"; -- T
when 5 =>
vfd_rs <= \'1\';
vfd_data <= \"01001101\"; -- M
when 6 =>
vfd_rs <= \'1\';
vfd_data <= \"00100000\"; --
when 7 =>
vfd_rs <= \'1\';
vfd_data <= \"00100000\"; --
when 8 =>
vfd_rs <= \'1\';
vfd_data <= \"01010011\"; -- S
when 9 =>
vfd_rs <= \'1\';
vfd_data <= \"01011001\"; -- Y
when 10 =>
vfd_rs <= \'1\';
vfd_data <= \"01010011\"; -- S
when 11 =>
vfd_rs <= \'1\';
vfd_data <= \"01010100\"; -- T
when 12 =>
vfd_rs <= \'1\';
vfd_data <= \"01000101\"; -- E
when 13 =>
vfd_rs <= \'1\';
vfd_data <= \"01000001\"; -- A
when 14 =>
vfd_rs <= \'1\';
vfd_data <= \"01001101\"; -- M
when 15 =>
vfd_rs <= \'1\';
vfd_data <= \"00100000\"; --
when 16 =>
vfd_rs <= \'1\';
vfd_data <= \"00100000\"; --
when 17 =>
vfd_rs <= \'1\';
vfd_data <= \"00100000\"; --
when 18 =>
vfd_rs <= \'1\';
vfd_data <= \"00100000\"; --
when 19 =>
vfd_rs <= \'1\';
vfd_data <= \"00100000\"; --
when 20 =>
vfd_rs <= \'1\';
vfd_data <= \"00100000\"; --
when others =>
end case;
-- 두 번째 라인 문자 데이터 입력
when line2 =>
vfd_rw <= \'0\';
case cnt is
when 0 =>
vfd_rs <= \'0\';
vfd_data <= \"11000000\";
when 1 =>
vfd_rs <= \'1\';
vfd_data <= \"00100000\"; --
when 2 =>
vfd_rs <= \'1\';
vfd_data <= \"01100010\"; -- b
when 3 =>
vfd_rs <= \'1\';
vfd_data <= \"01111001\"; -- y
when 4 =>
vfd_rs <= \'1\';
vfd_data <= \"00100000\"; --
when 5 =>
vfd_rs <= \'1\';
vfd_data <= \"01001110\"; -- N
when 6 =>
vfd_rs <= \'1\';
vfd_data <= \"01000001\"; -- A
when 7 =>
vfd_rs <= \'1\';
vfd_data <= \"01001101\"; -- M
when 8 =>
vfd_rs <= \'1\';
vfd_data <= \"01010100\"; -- T
when 9 =>
vfd_rs <= \'1\';
vfd_data <= \"01000001\"; -- A
when 10 =>
vfd_rs <= \'1\';
vfd_data <= \"01001110\"; -- N
when 11 =>
vfd_rs <= \'1\';
vfd_data <= \"01000111\"; -- G
when 12 =>
vfd_rs <= \'1\';
vfd_data <= \"01011111\"; -- _
when 13 =>
vfd_rs <= \'1\';
vfd_data <= \"01010100\"; -- T
when 14 =>
vfd_rs <= \'1\';
vfd_data <= \"01000101\"; -- E
when 15 =>
vfd_rs <= \'1\';
vfd_data <= \"01000001\"; -- A
when 16 =>
vfd_rs <= \'1\';
vfd_data <= \"01001101\"; -- M
when 17 =>
vfd_rs <= \'1\';
vfd_data <= \"00100000\"; --
when 18 =>
vfd_rs <= \'1\';
vfd_data <= \"00100000\"; --
when 19 =>
vfd_rs <= \'1\';
vfd_data <= \"00100000\"; --
when 20 =>
vfd_rs <= \'1\';
vfd_data <= \"00100000\"; --
when others =>
end case;
end case;
end if;
end process;
-- VFD 밝기 조절을 위한 PROCESS 문
vfd_light : process(CLK)
begin
if CLK\'event and CLK = \'1\' then
case fun_cnt is
when 0 => vfd_fun <= \"00111100\";
when 1 => vfd_fun <= \"00111111\";
when others => vfd_fun <= \"00111100\";
end case;
end if;
end process;
vfd_e <= CLK when light = \'0\' else \'0\';
end Behavioral;

키워드

디지털시스템 최종보고서 ,   VHDL을 이용한 ATM SYSTEM 설계,   전자공학심화 프로그램