스탑워치VHDL소스파일.

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스탑워치VHDL소스파일.에 대한 보고서 자료입니다.

본문내용

library ieee;
use ieee.std_logic_1164.all;

entity control is port(
clk : in std_logic;
st_op: in std_logic;
sw1 : in bit;
sw2 : in bit;
segcontrol : out std_logic_vector(3 downto 0);
segment : out std_logic_vector(6 downto 0));

end control;

architecture source of control is
signal bcd : integer range 9 downto 0;
signal tremble : integer range 0 to 25;
signal clk_secsec: integer range 0 to 1843200;
signal clk_sec: integer range 0 to 18432000;
signal clk_min1: integer range 0 to 110592000;
signal clk_min10: integer range 0 to 1105920000;
signal cnt_secsec : integer range 0 to 1;
signal cnt_sec : integer range 0 to 1;
signal cnt_min1 : integer range 0 to 1;
signal cnt_min10 : integer range 0 to 1;
signal see_secsec : integer range 0 to 9;
signal see_sec : integer range 0 to 5;
signal see_min1 : integer range 0 to 9;
signal see_min10 : integer range 0 to 5;
signal com_tmpo : integer range 0 to 25;
signal com_count : integer range 1 to 4;

begin

process (bcd)
begin
if bcd = 0 then segment <= "1000000";
elsif bcd = 1 then segment <= "1111001";
elsif bcd = 2 then segment <= "0100100";
elsif bcd = 3 then segment <= "0110000";
elsif bcd = 4 then segment <= "0011001";
elsif bcd = 5 then segment <= "0010010";
elsif bcd = 6 then segment <= "0000010";
elsif bcd = 7 then segment <= "1111000";
elsif bcd = 8 then segment <= "0000000";
elsif bcd = 9 then segment <= "0011000";
else segment <= "1111111";
end if;
end process;


process(clk_secsec)begin
if (clk'event and clk='1')then
if clk_secsec = 1843200 then
clk_secsec <= 0;
cnt_secsec <= 1;
else clk_secsec <= clk_secsec+1;
cnt_secsec <= 0;
end if;
end if;

end process;

process(cnt_secsec)begin
if(cnt_secsec'event and cnt_secsec=1)then
see_secsec <= see_secsec+1;
if(see_secsec=9) then
see_secsec <= 0;
end if;
end if;
end process;

process(clk_sec)begin
if (clk'event and clk='1')then
if clk_sec = 18432000 then
clk_sec <= 0;
cnt_sec <= 1;
else clk_sec <= clk_sec+1;
cnt_sec <= 0;
end if;
end if;
end process;


process(cnt_sec)begin
if(cnt_sec'event and cnt_sec=1)then
see_sec <= see_sec+1;
if(see_sec=5) then
see_sec <= 0;
end if;
end if;
end process;

process(clk_min1)begin
if (clk'event and clk='1')then
if clk_min1 = 110592000 then
clk_min1 <= 0;
cnt_min1 <= 1;
else clk_min1 <= clk_min1+1;
cnt_min1 <= 0;
end if;
end if;
end process;

process(cnt_min1)begin
if(cnt_min1'event and cnt_min1=1)then
see_min1 <= see_min1+1;
if(see_min1=9) then
see_min1 <= 0;
end if;
end if;
end process;

process(clk_min10)begin
if (clk'event and clk='1')then
if clk_min10 = 1105920000 then
clk_min10 <= 0;
cnt_min10 <= 1;
else clk_min10 <= clk_min10+1;
cnt_min10 <= 0;
end if;
end if;
end process;

키워드

clk,   integer,   segment,   sec,   min,   start,   stop